1. Field of the Invention
The present invention generally relates to laminated electronic components, and more particularly to a laminated electronic component provided with an external conductor film on an exposed exterior surface.
2. Description of the Related Art
FIG. 5 is a sectional view illustrating a known laminated electronic component 1 disclosed in Japanese Unexamined Patent Application Publication No. 2001-267448.
The laminated electronic component 1 is mounted on a board 2 indicated by an imaginary line and is provided with a laminated block 4. The laminated block 4 is formed by laminating a plurality of electrically insulating layers 3 along a thickness direction of the laminated block 4. The insulating layers 3 are generally formed of ceramic material.
The laminated block 4 is provided with a cavity 7 having an opening 6 at least on one main surface, for example, on a first main surface 5 facing the mounting board 2. In the cavity 7, a chip component 8, for example, an IC chip or a surface acoustic wave (SAW) filter, is stored therein. The cavity 7 may sometimes be filled with an electrically insulating resin after receiving the chip component 8 therein, though it is not shown.
Several internal conductor films and several via-hole conductors are disposed within the laminated block 4 so as to provide wiring patterns required for the laminated electronic component 1, though details of such an arrangement are not shown. These internal conductor films and via-hole conductors are sometimes disposed in the laminated block 4 such that they form capacitors, inductors, delay lines, or filters. Within the laminated block 4, not only the internal conductor films, but also resistor films for defining resistors may be provided.
In FIG. 5, there is shown in which a pair of capacitor-forming conductor films 9 and 10 for defining a capacitor are disposed as the internal conductor films such that they face each other with a specific insulating layer 3 therebetween. In the laminated block 4, the first main surface 5, a second main surface 11 facing the first main surface 5, and a bottom surface 12 of the cavity 7 are exposed on the exterior of the insulating layers 3. An external conductor film 3 is provided on the first main surface 5, an external conductor film 14 is provided on the second main surface 11, and an external conductor film 15 is provided on the cavity 12.
The external conductor film 13 functions as a conductive land for establishing an electrical connection with the board (motherboard) 2 on which the laminated electronic component 1 is mounted. The external conductor film 14 functions as a conductive land for establishing an electrical connection with a chip component 16 mounted on the second main surface 11. The external conductor film 15 provides a die bonding surface for bonding the chip component 8 housed in the cavity 7.
The chip components 16 mounted on the second main surface 11 of the laminated block 4 include electronic components defining capacitors, inductors, resistors, diodes, ICs, memory devices, SAW filters, or quartz oscillators.
A certain impact is imposed on the external conductor films 13, 14, and 15 on the following respective occasions: when the laminated electronic component 1 is mounted on the board 2, when the chip components 16 are mounted, and when the chip component 8 is mounted. A stress resulting from such an impact may cause cracks in the insulating layers 3 positioned adjacent to the external conductor films 13, 14, and 15. Particularly, such cracks easily occur when the insulating layers 3 are formed of ceramics. Cracks may also occur, for example, when the laminated electronic component 1 is dropped or when it collides with another component.
When cracks occur in ceramics positioned adjacent to the external conductor films 13, 14, and 15 as described above, the following problems may arise.
It is now assumed, for example, that a crack occurs in the insulating layer 3 adjacent to the external conductor layer 15, and in this state, the laminated electronic component 1 is used while a ground potential is supplied to the external conductor film 15. In this case, since a constant DC bias is applied between the external conductor film 15 and, for example, the capacitor-forming conductor film 10, migration of metal materials forming the external conductor film 15 and the capacitor-forming conductor film 10 may be facilitated therebetween, causing short-circuiting or leakage, thereby impairing the functions of the laminated electronic component 1. The above-described problem also applies to the external conductor films 13 and 14.